SUM70090E www.vishay.com vishay siliconix s16-0163-rev. a, 01-feb-16 1 document number: 64432 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 n-channel 100 v (d-s) mosfet ordering information: SUM70090E-ge3 (lead (pb)-free and halogen-free) features ? thunderfet ? power mosfet ? maximum 175 c junction temperature ?q gd / q gs ratio < 1 optimizes switching characteristics ? 100 % r g and uis tested ? material categorization: for definitions of co mpliance please see www.vishay.com/doc?99912 applications ? power supply - secondary synchronous rectification ?dc/dc converter ? power tools ? motor drive switch ? dc/ac inverter ? battery management notes a. duty cycle ? 1 %. b. when mounted on 1" square pcb (fr4 material). c. package limited. product summary v ds (v) r ds(on) ( ? ) max. i d (a) c q g (typ.) 100 0.0089 at v gs = 10 v 50 33 nc 0.0093 at v gs = 7.5 v 50 to-263 top view g d s g d s n-channel mosfet g d s absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 100 v gate-source voltage v gs 20 continuous drain current (t j = 150 c) t c = 25 c i d 50 c a t c = 70 c 50 c pulsed drain current (t = 100 s) i dm 120 avalanche current i as 40 single avalanche energy a l = 0.1 mh e as 80 mj maximum power dissipation a t c = 25 c p d 125 w t c = 70 c b 87.5 operating junction and storage temperature range t j , t stg -55 to +175 c thermal resistance ratings parameter symbol limit unit junction-to-ambient (pcb mount) b r thja 40 c/w junction-to-case (drain) r thjc 1.2
SUM70090E www.vishay.com vishay siliconix s16-0163-rev. a, 01-feb-16 2 document number: 64432 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. pulse test; pulse width ? 300 s, duty cycle ? 2 %. b. guaranteed by design, not su bject to production testing. c. independent of operating temperature. stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (t j = 25 c, unless otherwise noted) parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 100 - - v gate threshold voltage v gs(th) v ds = v gs , i d = 250 a 2 - 4 gate-body leakage i gss v ds = 0 v, v gs = 20 v - - 250 na zero gate voltage drain current i dss v ds = 100 v, v gs = 0 v - - 1 a v ds = 100 v, v gs = 0 v, t j = 125 c - - 150 v ds = 100 v, v gs = 0 v, t j = 175 c - - 5 ma on-state drain current a i d(on) v ds ? 10 v, v gs = 10 v 50 - - a drain-source on-s tate resistance a r ds(on) v gs = 10 v, i d = 20 a - 0.0074 0.0089 ? v gs = 7.5 v, i d = 15 a - 0.0077 0.0093 forward transconductance a g fs v ds = 15 v, i d = 10 a - 38 - s dynamic b input capacitance c iss v gs = 0 v, v ds = 50 v, f = 1 mhz - 1950 - pf output capacitance c oss - 845 - reverse transfer capacitance c rss -54- total gate charge c q g v ds = 50 v, v gs = 10 v, i d = 20 a -3350 nc gate-source charge c q gs -8.8- gate-drain charge c q gd -7.5- gate resistance r g f = 1 mhz 0.7 3.5 7 ? turn-on delay time c t d(on) v dd = 50 v, r l = 5 ? i d ? 10 a, v gen = 10 v, r g = 1 ? -1530 ns rise time c t r -2754 turn-off delay time c t d(off) -3672 fall time c t f -4590 drain-source body diode ra tings and characteristics b (t c = 25 c) pulsed current (t = 100 s) i sm --120a forward voltage a v sd i f = 10 a, v gs = 0 v - 0.8 1.5 v reverse recovery time t rr i f = -10 a, di/dt = 100 a/s - 77 116 ns peak reverse recovery charge i rm(rec) -4.26.3a reverse recovery charge q rr - 145 365 nc
SUM70090E www.vishay.com vishay siliconix s16-0163-rev. a, 01-feb-16 3 document number: 64432 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) output characteristics on-resistance vs. drain current gate charge transfer characteristics capacitance transconductance 10 100 1000 10000 0 30 60 90 120 012345 axis title 1st line 2nd line 2nd line i d - drain current (a) v ds - drain-to-source voltage (v) 2nd line v gs = 10 v thru 6 v v gs = 5 v v gs = 4 v 10 100 1000 10000 0 0.003 0.006 0.009 0.012 0.015 0306090120 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () i d - drain current (a) 2nd line v gs = 7.5 v v gs = 10 v 10 100 1000 10000 0 2 4 6 8 10 0 7 14 21 28 35 axis title 1st line 2nd line 2nd line v gs - gate-to-source voltage (v) q g - total gate charge (nc) 2nd line i d = 15 a v ds = 30 v 10 100 1000 10000 0 25 50 75 100 02468 axis title 1st line 2nd line 2nd line i d - drain current (a) v gs - gate-to-source voltage (v) 2nd line t c = 25 c t c =-55 c t c = 125 c 10 100 1000 10000 0 600 1200 1800 2400 3000 3600 0 20406080100 axis title 1st line 2nd line 2nd line c - capacitance (pf) v ds - drain-to-source voltage (v) 2nd line c rss c oss c iss 10 100 1000 10000 0 15 30 45 60 0 3.0 6.0 9.0 12.0 15.0 axis title 1st line 2nd line 2nd line g fs - transconductance (s) i d - drain current (a) 2nd line t c = 25 c t c =-55 c t c = 125 c
SUM70090E www.vishay.com vishay siliconix s16-0163-rev. a, 01-feb-16 4 document number: 64432 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (t a = 25 c, unless otherwise noted) on-resistance vs. junction temperature on-resistance vs. gate-to-source voltage drain source voltage vs . junction temperature source drain diode forward voltage threshold voltage safe operating area 10 100 1000 10000 0.6 0.9 1.2 1.5 1.8 2.1 -50-25 0 255075100125150175 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance (normalized) t j - junction temperature (c) 2nd line i d = 20 a v gs = 10 v v gs = 7.5 v 10 100 1000 10000 0 0.006 0.012 0.018 0.024 0.03 246810 axis title 1st line 2nd line 2nd line r ds(on) - on-resistance () v gs - gate-to-source voltage (v) 2nd line t j = 25 c t j = 150 c 10 100 1000 10000 104 108 112 116 120 -50 -25 0 25 50 75 100 125 150 175 axis title 1st line 2nd line 2nd line v ds - drain-to-source voltage (v) t j - temperature (c) 2nd line i d = 250 a 10 100 1000 10000 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1.0 1.2 axis title 1st line 2nd line 2nd line i s - source current (a) v sd - source-to-drain voltage (v) 2nd line t j = 150 c t j = 25 c 10 100 1000 10000 1.2 1.8 2.4 3.0 3.6 -50 -25 0 25 50 75 100 125 150 175 axis title 1st line 2nd line 2nd line v gs(th) (v) t j - temperature (c) 2nd line i d = 250 a 10 100 1000 10000 0.01 0.1 10 100 1000 0.1 1 10 100 axis title 1st line 2nd line 2nd line v d s -drain-to- s ource voltage (v) * v gs > minimum v gs at which r d s (on) i s s pecified dc, 10 s , 1 s , 100 m s 1 m s t c = 25 c s ingle pul s e bvd ss limited 100 s 10 m s 1 i d - drain current (a) limited by r d s (on) * limited by i dm
SUM70090E www.vishay.com vishay siliconix s16-0163-rev. a, 01-feb-16 5 document number: 64432 for technical questions, contact: pmostechsupport @vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 thermal ratings (t a = 25 c, unless otherwise noted) current de-rating normalized thermal transient impedance, junction-to-case note ? the characteristics shown in the two graphs - normalized transient thermal impedance junction to ambient (25 c) - normalized transient thermal impedance junction to case (25 c) are given for general guidelines only to enable the user to ge t a ball park indication of part capabilities. the data are ext racted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. the latter is valid for the part mounted on printed circuit board - fr4, size 1" x 1" x 0.062" , double sided with 2 oz. copper, 100 % on both sides. the part ca pabilities can widely vary depending on actual application parameters and operating conditions. vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?64432 . 10 100 1000 10000 0 25 50 75 100 0255075100125150175 axis title 1st line 2nd line 2nd line i d - drain current (a) t c - case temperature (c) 2nd line package limited 0.1 1 0.0001 0.001 0.01 0.1 1 normalized effective transient thermal impedance square wave pulse duration (s) duty cycle = 0.5 0.2 0.1 0.05 single pulse 0.02 t 1 t 2 notes: p dm 1. duty cycle, d = 2. per unit base = r thjc = 1.2 c/w 3. t jm -t a =p dm z thja (t) t 1 t 2 4. surface mounted
package information www.vishay.com vishay siliconix revison: 30-sep-13 1 document number: 71198 this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 to-263 (d 2 pak): 3-lead notes 1. plane b includes maximum featur es of heat sink tab and plastic. 2. no more than 25 % of l1 ca n fall above seating plane by max. 8 mils. 3. pin-to-pin coplanarity max. 4 mils. 4. *: thin lead is for sub, syb. thick lead is for sum, sym, sqm. 5. use inches as the primary measurement. 6. this feature is for thick lead. -a- -b- d1 d4 a a e b2 b e a c2 c l2 d l3 l detail ?a? e1 e2 k e3 d2 d3 6 0.010 m a m 2 pl detail a (rotated 90) s ection a-a 0 - 5 l1 l4 m c1 c b1 b inches millimeters dim. min. max. min. max. a 0.160 0.190 4.064 4.826 b 0.020 0.039 0.508 0.990 b1 0.020 0.035 0.508 0.889 b2 0.045 0.055 1.143 1.397 c* thin lead 0.013 0.018 0.330 0.457 thick lead 0.023 0.028 0.584 0.711 c1 thin lead 0.013 0.017 0.330 0.431 thick lead 0.023 0.027 0.584 0.685 c2 0.045 0.055 1.143 1.397 d 0.340 0.380 8.636 9.652 d1 0.220 0.240 5.588 6.096 d2 0.038 0.042 0.965 1.067 d3 0.045 0.055 1.143 1.397 d4 0.044 0.052 1.118 1.321 e 0.380 0.410 9.652 10.414 e1 0.245 - 6.223 - e2 0.355 0.375 9.017 9.525 e3 0.072 0.078 1.829 1.981 e 0.100 bsc 2.54 bsc k 0.045 0.055 1.143 1.397 l 0.575 0.625 14.605 15.875 l1 0.090 0.110 2.286 2.794 l2 0.040 0.055 1.016 1.397 l3 0.050 0.070 1.270 1.778 l4 0.010 bsc 0.254 bsc m - 0.002 - 0.050 ecn: t13-0707-rev. k, 30-sep-13 dwg: 5843
an826 vishay siliconix document number: 73397 11-apr-05 www.vishay.com 1 recommended minimum pads for d 2 pak: 3-lead 0.635 (16.129) recommended minimum pads dimensions in inches/(mm) 0.420 (10.668) 0.355 (9.017) 0.145 (3.683) 0.135 (3.429) 0.200 (5.080) 0.050 (1.257) return to index
legal disclaimer notice www.vishay.com vishay revision: 13-jun-16 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.
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